Improved Sampling in Carrier-Based Discountinuous SVPWM Simulation

Authors

  • Okik Surikno Universitas Ahmad Dahlan
  • Tole Sutikno Universitas Ahmad Dahlan

DOI:

https://doi.org/10.12928/biste.v2i3.1753

Keywords:

SVPWM, Discontinuous, Sinyal referensi, Sampling, FPGA, Quartus II

Abstract

In this study, a circuit was designed to improve sampling in discontinuous SVPWM simulations using Quartus II software. The v_beta_sin unit was successfully simulated using the waveform editor. The results displayed are in accordance with previous calculations, if the input is 000000001 then the output is 100000011 and so on. The v_alfa_cos unit is also successfully simulated using the waveform editor. The simulation results if the input is 000000001 then the output is 111111111 and so on, according to the previous calculation. The unit counter was successfully simulated using the block diagram in Quartus II. The output of this unit counter is in the form of 9 bits to retrieve v_beta_sin and v_alfa_cos data. The v_beta_sin, v_alfa_cos and counter units used as reference signals are successfully simulated and can be used as a supporting circuit in the simulation of the discontinuous SVPWM method. The results of the simulation show an increase in sampling or sampling by 512.

Author Biographies

Okik Surikno, Universitas Ahmad Dahlan

Progam studi Teknik Elektro

Tole Sutikno, Universitas Ahmad Dahlan

Progam Studi Teknik Elektro

References

B. A. Yomahudaya and T. Sutikno, “Pembangkit Sinyal SPWM untuk Multilevel Inverter Satu Fasa Lima Tingkat Berbasis Mikrokontroler At-Mega32,” Jurnal Ilmu Teknik Elektro Komputer dan Informatika, vol. 3-2, pp. 73-81, 2017. DOI: 10.26555/jiteki.v3i2.5927

Z. G. Wang, et al., “SVPWM Techniques and Applications in HTS PMSM Machines Control,” Journal Of Electronic Science And Technology Of China, vol. 6-2, pp. 191-197, 2008.

T. Sutikno, A. Jidin, N. R. N. Idris, “New approach FPGA-based implementation of discontinuous SVPWM,” Turk J Elec Eng & Comp Sci, vol. 18, no. 4, 2010. DOI: 10.3906/elk-0906-21

A. Belkheiri, S. Aoughellanet and M. Belkheiri, “FPGA Implementation of a Space Vector Pulse Width Modulation Technique for a Two-Level Inverter,” Elektrotehniški Vestnik, vol. 85, no. 3, pp. 1-7, 2018. Online

T. Sutikno, W. J. Hwa, A. Jidin and N. R. N. Idris “A Simple Approach of Space-vector Pulse Width Modulation Realization Based on Field Programmable Gate Array,” Electric Power Components and Systems, vol. 38, pp. 1546-1557, 2010. DOI: 10.1080/15325008.2010.482092

B. Rashidi and M. Sabahi, “High Performance FPGA Based Digital Space Vector PWM Three Phase Voltage Source Inverter,” I.J.Modern Education and Computer Science, vol. 1, pp. 62-71, 2013. DOI: 10.5815/ijmecs.2013.01.08

T. Sutikno, A. Jidin, and M. F. Basar, “Simple Realization of 5-Segment Discontinuous SVPWM Based on FPGA,” International Journal of Computer and Electrical Engineering, vol. 2-1, pp. 1793-8163, 2010. Online

T. Sutikno, N. R. N. Idris, A. Jidin, M. H. Jopri, “FPGA Based Optimized Discontinuous SVPWM Algorithm for Three Phase VSI in AC Drives,” International Journal of Power Electronics and Drive System, vol. 3-2, pp. 228-240, 2013. DOI: 10.11591/ijpeds.v3i1.735

M. A. Khan and A. Iqbal, A. R. Haitham “Investigation of Discontinuous Space Vector PWM Techniques of a Three-phase Voltage Source Inverter,” i-manager’s Journal on Electrical Engineering, vol. 2-3, pp. 60-71, 2009. Online

M. A. Khan, A. Iqbal, Sk M. Ahmad, Z. husain “Analysis of Discontinuous Space Vector PWM Techniques for a Seven-Phase Voltage Source Inverter,” International Journal of Power Electronics and Drive System, vol. 2-2, pp. 203-218, 2012. Online

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Published

2020-11-30

How to Cite

[1]
O. Surikno and T. Sutikno, “Improved Sampling in Carrier-Based Discountinuous SVPWM Simulation”, Buletin Ilmiah Sarjana Teknik Elektro, vol. 2, no. 3, pp. 137–144, Nov. 2020.

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